The KamLAND front end electronics (FEE) system is based on an innovative Application Specific Integrated Circuit (ASIC) developed at LBNL, the Analog Transient Waveform Digitizer (ATWD). The ATWD can capture signals at sample speeds from 200 MHz to well over one GHz. The sampling action is generated internally without the need for high-speed external clocks. The use of the ATWD permits extremely high sampling speeds while allowing a conservative board-level clock frequency (e.g. 40 MHz). The ATWD is equipped with a common-ramp parallel Wilkinson 10-bit ADC, permitting the direct conversion on-chip of the captured analog signal. Digitization and readout of the entire 128-sample waveform requires about 25 microseconds at 40 MHz for the 10-bit range.

We made a great deal of progress on the KamLAND electronics during 2001, moving from the board design phase, through production, testing, and installation, into the start of data-taking for commissioning. During the first half of the year, the FEE board design was completed and refined through a series of tests. In addition, every ATWD chip to be installed on the

The initial tests of the completed FEE boards revealed multiple problems; in fact almost none of the boards worked. Most problems were traced to errors in the component loading. These included incorrect or missing parts, parts put on backwards, solder bridging, and unsoldered connections. The last posed a particular problem, as unsoldered pins can work correctly for long periods before failing. We were forced to devote a large amount of time to testing the FEE boards, diagnosing failures, and repairing them.

By the mid-November we had fixed a sufficient number of FEE boards to allow KamLAND to start to collect commissioning data. The electronics cabling was then completed, and the first full-detector data was collected on November 27.

Figure 1. One crate of installed and cabled KamLAND front-end electronics.